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Firts Steemit VHDL Tutotorial [Bringing Nerd power to Steemit] Part1 by cultura.bitcoin

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Firts Steemit VHDL Tutotorial [Bringing Nerd power to Steemit] Part1
http://wallpapercave.com/wp/Il0TFHU.png

We are excited to share the FIRST Steemit VHDL #tutorial. We are a team of students of electrical engeneering and computer #science, we love what we do and because of that we started a #blog. In a nutshell, we find it difficult to monetize enough, so we eventually stopped blogging and start mining altcoins. But now we're going back to do what we love with #Steemit. 

And without further ado, we'll start by sharing and 'n' bits counter in VHDL.
Counters are present in most of technological systems. Its applications include:

-Quantification df objects and events .
-They measure #Time .
-They Multiplex time.
 -Measure Frequency ... among many others.

This algorithms are important to those who are curious about the subject, they have to pass trough this theory. In essence, a digital counter simply counts the number of pulses per unit of time . And we'll put this logic in VHDL ( VHSIC Hardware Descripction Language ) .

The algorithm is as follows thought  VHDL ( version Xilinx ISE Design Suite 14.7) :

-> Ports are defined inputs and outputs .
-> Constants and signals for the delay are defined (So we can view changes).
 -> The behavior of the counter, which is a finite cycle, is described where the condition exists : if condition ' x' then counter = counter +1 .
 Full conversion to vector is done, this is preferred because the counter programming is more similar to high-level programming to which we are accustomed, like  C language.

First you have to be careful to choose the right card features that you will program . These features can be found in small print on the chip of your card.

https://marcosbatallar.files.wordpress.com/2015/12/especificaciones.jpg?w=560&h=317

As mentioned in the algorithm , first we have to declared the input and output ports .
 Add the ieee.std_logic_arith.all library for converting this entirely to vector. Notice how you can resize the bits by simply changing the value range of the signal. 
For example if you wanted to make an 16-bit counter , you raise 2 to the power of 16 and you subtract one to the result , that is the number  of the range . In this case we will use a 3-bit counter = > 2 ^ 3 = 8-1 = 7

https://marcosbatallar.files.wordpress.com/2015/12/declaracionconsysen1.jpg?w=1108

End of part 1
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